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Freescale Semiconductor /MK65F18 /USBPHY /DEBUG_CLR

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Interpret as DEBUG_CLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OTGIDPIOLOCK)OTGIDPIOLOCK 0 (DEBUG_INTERFACE_HOLD)DEBUG_INTERFACE_HOLD 0HSTPULLDOWN 0ENHSTPULLDOWN 0TX2RXCOUNT 0 (ENTX2RXCOUNT)ENTX2RXCOUNT 0SQUELCHRESETCOUNT 0 (ENSQUELCHRESET)ENSQUELCHRESET 0SQUELCHRESETLENGTH 0 (HOST_RESUME_DEBUG)HOST_RESUME_DEBUG 0 (CLKGATE)CLKGATE

Description

USB PHY Debug Register

Fields

OTGIDPIOLOCK

Once OTG ID from USBPHY_STATUS_OTGID_STATUS is sampled, use this to hold the value
DEBUG_INTERFACE_HOLD

Use holding registers to assist in timing for external UTMI interface.
HSTPULLDOWN

This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through USBPHY_DEBUG[5:4} Set bit 3 to value 1’b1 to connect the 15ohm pulldown on USB_DP line
ENHSTPULLDOWN

This bit field selects host pulldown overdrive mode
TX2RXCOUNT

Delay in between the end of transmit to the beginning of receive
ENTX2RXCOUNT

Set this bit to allow a countdown to transition in between TX and RX.
SQUELCHRESETCOUNT

Delay in between the detection of squelch to the reset of high-speed RX.
ENSQUELCHRESET

Set bit to allow squelch to reset high-speed receive.
SQUELCHRESETLENGTH

Duration of RESET in terms of the number of 480-MHz cycles.
HOST_RESUME_DEBUG

Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1.
CLKGATE

Gate Test Clocks

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data